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Miscellaneous EDA Utilities
Baya- SoC Platform Assembly Tool
This free tool is meant to automate the integraton of IPS and Sub-Systems to build SoC or big Sub-System by taking very minimum input from the designer. This tool allows designers to integrate all the IPs/components in an efficient way through the very rich set of Tcl commands or Excel/CSV file. There are around 200 highlevel Tcl commands and hundreds of low level APIs for the advanced users. It supports IP-XACT which enables the designers to import IP-XACT components instead of Verilog/VHDL definition of same. One simple example of a Tcl command file has been given below along with the output.

Go through the README, Documentation and the examples in the installation area to get a better understanding of this tool. Feel free to contact support  for any assistance.
Example Tcl Shell Usage
Executed following commands in the unix prompt after extracting the Baya release.
### Content of the input Tcl fiile: create_design.tcl

## The object $baya is already defined/created above.
## We need tto just invoke the APIs of the $baya to create
## top design i.e. SoC or sub-system

baya_set_file -name system1.v

set socname  Leon2Platform

############ Create the top DUT
baya_create_module -name $socname 

#### Create port of the DUT
baya_create_port -name logic_zero -dir in -range "15:0"
baya_create_port -name clkin -dir in
baya_create_port -name rstin_an -dir in
baya_create_port -name SimDone -dir out 
#### Import the designs
baya_import_vhdl -file ./RTL_COMP/leon2Ahbram.vhd -top leon2Ahbram
#$baya importVHDLEntity ./RTL_COMP/leon2Ahbbus22.vhd leon2Ahbbus22
baya_import_ipxact -xml XML_COMP/ahbbus22.xml
baya_import_vhdl -file ./RTL_COMP/apbSubSystem_ent.vhd -top apbSubSystem
baya_import_vhdl -file ./RTL_COMP/cgu.vhd -top cgu
baya_import_vhdl -file ./RTL_COMP/leon2Dma.vhd -top leon2Dma
baya_import_vhdl -file ./RTL_COMP/processor.vhd -top processor
baya_import_vhdl -file ./RTL_COMP/rgu.vhd -top rgu


############ Set the currrent design to the top DUT

baya_set_current_module -name $socname

#### Create instances of each of the imported  components and the param maps
## The leon2Ahbbus22 is defined in RTL
## The ahbbus22 is defined in the IPXACT comp file
baya_create_parameter -name myParam -value 2 
### This parameter will get created
###in the module current module which we have set with 
### the baya_set_current_module command as above

baya_create_instance -name uahbbus -master ahbbus22
### The instances will get created in the current moduel as we have set before

baya_create_parameter_map -inst uahbbus -param start_addr_slv0 -value 0
baya_create_parameter_map -inst uahbbus -param restart_addr_slv0 -value 0
baya_create_parameter_map -inst uahbbus -param range_slv0 -value 1048576
baya_create_parameter_map -inst uahbbus -param mst_access_slv0 -value 3
baya_create_parameter_map -inst uahbbus -param start_addr_slv1 -value 12288
baya_create_parameter_map -inst uahbbus -param restart_addr_slv1 -value 12288
baya_create_parameter_map -inst uahbbus -param range_slv1 -value 36864
baya_create_parameter_map -inst uahbbus -param mst_access_slv1 -value myParam+1
baya_create_parameter_map -inst uahbbus -param defmast -value 1

baya_create_instance -name uahbram  -master leon2Ahbram
baya_create_parameter_map -inst uahbram -param abits -value 20

baya_create_instance -name uapbSubSystem  -master apbSubSystem

baya_create_instance -name ucgu -master cgu

baya_create_instance -name  udma -master leon2Dma

baya_create_instance -name  uproc -master processor

baya_create_parameter_map -inst uproc -param local_memory_start_addr -value 16'h1000

baya_create_parameter_map -inst uproc -param local_memory_addr_bits  -value 12

baya_create_instance -name  urgu -master rgu

#### Create connections

### You need to specify the bit/part selectsa otherwise Tcl will
### evaluate that as an Tcl expression since the operator is '[]'

### Connect the ground zero
baya_add_connection -src logic_zero -dest uahbbus.remap
baya_add_connection -src logic_zero -dest uahbbus.hlock_mst0
baya_add_connection -src logic_zero\[15:0\] -dest uahbbus.hsplit_slv1
#### Trying by providing range with the () instead of []
baya_add_connection -src logic_zero(0) -dest uproc.clkn
baya_add_connection -src logic_zero\[0\] -dest uproc.tck
baya_add_connection -src logic_zero\[0\] -dest uproc.ntrst
baya_add_connection -src logic_zero\[0\] -dest uproc.tms
baya_add_connection -src logic_zero\[0\] -dest uproc.tdi

### Connect the reset
baya_add_connection -src urgu.rstout_an\[0\] -dest urgu.presetn
baya_add_connection -src urgu.rstout_an\[0\] -dest uahbbus.rst 
baya_add_connection -src urgu.rstout_an\[0\] -dest uahbram.rst
baya_add_connection -src urgu.rstout_an\[0\] -dest uapbSubSystem.rst_an
baya_add_connection -src urgu.rstout_an\[0\] -dest ucgu.presetn
baya_add_connection -src urgu.rstout_an\[0\] -dest udma.rst
baya_add_connection -src urgu.rstout_an\[0\] -dest uproc.presetn
baya_add_connection -src urgu.rstout_an\[0\] -dest uproc.hresetn
baya_add_connection -src urgu.rstout_an\[1\] -dest uproc.rst_an

### Connect the clock
baya_add_connection -src ucgu.clkout\[0\] -dest uahbbus.clk
baya_add_connection -src ucgu.clkout\[0\] -dest ucgu.pclk
baya_add_connection -src ucgu.clkout\[0\] -dest uahbram.clk
baya_add_connection -src ucgu.clkout\[0\] -dest uapbSubSystem.clk
baya_add_connection -src ucgu.clkout\[0\] -dest udma.clk
baya_add_connection -src ucgu.clkout\[0\] -dest uproc.pclk
baya_add_connection -src ucgu.clkout\[0\] -dest uproc.hclk
baya_add_connection -src ucgu.clkout\[0\] -dest urgu.pclk
baya_add_connection -src ucgu.prdata -dest uapbSubSystem.i_apbbus_slv4_prdata

## Connect the hgrants of the bus 
baya_add_connection -src uahbbus.hgrant_mst0 -dest uproc.hgrant
baya_add_connection -src uahbbus.hgrant_mst1 -dest udma.hgrant

## Connect the hready of the bus 
baya_add_connection -src uahbbus.hready_mst0 -dest uproc.hready
baya_add_connection -src uahbbus.hready_mst1 -dest udma.hready

## Connect the hresp of the bus 
baya_add_connection -src uahbbus.hresp_mst0 -dest uproc.hresp
baya_add_connection -src uahbbus.hresp_mst1 -dest udma.hresp

## Connect the hrdata of the bus 
baya_add_connection -src uahbbus.hrdata_mst0 -dest uproc.hrdata
baya_add_connection -src uahbbus.hrdata_mst1 -dest udma.hrdata

## Connect the busreq of the bus 
baya_add_connection -src uproc.hbusreq -dest uahbbus.hbusreq_mst0
baya_add_connection -src udma.hbusreq -dest uahbbus.hbusreq_mst1

## Connect the htrans of the bus 
baya_add_connection -src udma.htrans -dest uahbbus.htrans_mst1
baya_add_connection -src uproc.htrans -dest uahbbus.htrans_mst0

## Other connections
baya_add_connection -src uproc.hwrite -dest uahbbus.hwrite_mst0
baya_add_connection -src uproc.hsize -dest uahbbus.hsize_mst0
baya_add_connection -src uproc.hburst -dest uahbbus.hburst_mst0
baya_add_connection -src uproc.hprot -dest uahbbus.hprot_mst0
baya_add_connection -src uproc.haddr -dest uahbbus.haddr_mst0
baya_add_connection -src uproc.hwdata -dest uahbbus.hwdata_mst0
baya_add_connection -src uproc.prdata -dest uapbSubSystem.i_apbbus_slv6_prdata
baya_add_connection -src uproc.intack -dest uapbSubSystem.Interrupt_INTack
baya_add_connection -src uproc.irqvec -dest uapbSubSystem.Interrupt_IRQVEC
baya_add_connection -src uproc.SimDone -dest SimDone

baya_add_connection -src uapbSubSystem.i_apbbus_slv6_psel -dest uproc.psel
baya_add_connection -src uapbSubSystem.i_apbbus_slv6_penable -dest uproc.penable
baya_add_connection -src uapbSubSystem.i_apbbus_slv6_paddr\[11:0\] -dest uproc.paddr
baya_add_connection -src uapbSubSystem.i_apbbus_slv6_pwrite -dest uproc.pwrite
baya_add_connection -src uapbSubSystem.i_apbbus_slv6_pwdata -dest uproc.pwdata
baya_add_connection -src uapbSubSystem.Interrupt_IRL -dest uproc.irl
baya_add_connection -src uapbSubSystem.i_apbbus_slv5_paddr -dest urgu.paddr\[11:0\]
baya_add_connection -src uapbSubSystem.i_apbbus_slv5_pwrite -dest urgu.pwrite
baya_add_connection -src urgu.prdata -dest uapbSubSystem.i_apbbus_slv5_prdata

baya_add_connection -src udma.hwrite -dest uahbbus.hwrite_mst1
baya_add_connection -src udma.hsize -dest uahbbus.hsize_mst1
baya_add_connection -src udma.hburst -dest uahbbus.hburst_mst1
baya_add_connection -src udma.hprot -dest uahbbus.hprot_mst1
baya_add_connection -src udma.hwdata -dest uahbbus.hwdata_mst1
baya_add_connection -src udma.prdata -dest uapbSubSystem.i_apbbus_slv7_prdata
baya_add_connection -src udma.haddr -dest uahbbus.haddr_mst1

baya_add_connection -src uapbSubSystem.i_apbbus_slv7_pwdata -dest udma.pwdata 
baya_add_connection -src uapbSubSystem.i_apbbus_slv7_pwrite -dest udma.pwrite 
baya_add_connection -src uapbSubSystem.i_apbbus_slv7_paddr -dest udma.paddr 
baya_add_connection -src uapbSubSystem.i_apbbus_slv7_penable -dest udma.penable 
baya_add_connection -src uapbSubSystem.i_apbbus_slv7_psel -dest udma.psel 
baya_add_connection -src uapbSubSystem.i_apbbus_slv4_pwdata -dest ucgu.pwdata 
baya_add_connection -src uapbSubSystem.i_apbbus_slv4_pwrite -dest ucgu.pwrite 
#### Trying by providing range with the () instead of []
baya_add_connection -src uapbSubSystem.i_apbbus_slv4_paddr(11:0) -dest ucgu.paddr 
baya_add_connection -src uapbSubSystem.i_apbbus_slv4_penable -dest ucgu.penable 
baya_add_connection -src uapbSubSystem.i_apbbus_slv4_psel -dest ucgu.psel 


baya_add_connection -src uahbbus.hwrite_slv1 -dest uapbSubSystem.ex_ambaAHB_hwrite
baya_add_connection -src uahbbus.hwdata_slv1 -dest uapbSubSystem.ex_ambaAHB_hwdata
baya_add_connection -src uahbbus.htrans_slv1 -dest uapbSubSystem.ex_ambaAHB_htrans
baya_add_connection -src uahbbus.hsize_slv1 -dest uapbSubSystem.ex_ambaAHB_hsize
baya_add_connection -src uahbbus.hsel_slv1 -dest uapbSubSystem.ex_ambaAHB_hsel
baya_add_connection -src uapbSubSystem.ex_ambaAHB_hresp -dest uahbbus.hresp_slv1

baya_add_connection -src uahbbus.hprot_slv1 -dest uapbSubSystem.ex_ambaAHB_hprot
baya_add_connection -src uahbbus.hburst_slv1 -dest uapbSubSystem.ex_ambaAHB_hburst
baya_add_connection -src uahbbus.haddr_slv1 -dest uapbSubSystem.ex_ambaAHB_haddr

baya_add_connection -src uapbSubSystem.ex_ambaAHB_hready_resp -dest uahbbus.hreadyout_slv1
baya_add_connection -src uapbSubSystem.ex_ambaAHB_hrdata -dest uahbbus.hrdata_slv1

baya_add_connection -src uahbram.hsplit_s -dest uahbbus.hsplit_slv0
baya_add_connection -src uahbram.hrdata_s -dest uahbbus.hrdata_slv0
baya_add_connection -src uahbram.hresp_s -dest uahbbus.hresp_slv0
baya_add_connection -src uahbram.hreadyo_s -dest uahbbus.hreadyout_slv0

baya_add_connection -src uahbbus.hmastlock_slv0 -dest uahbram.hmastlock_s
baya_add_connection -src uahbbus.hreadyin_slv0 -dest uahbram.hreadyi_s
baya_add_connection -src uahbbus.hprot_slv0 -dest uahbram.hprot_s
baya_add_connection -src uahbbus.hwdata_slv0 -dest uahbram.hwdata_s
baya_add_connection -src uahbbus.hburst_slv0 -dest uahbram.hburst_s
baya_add_connection -src uahbbus.hsize_slv0 -dest uahbram.hsize_s
baya_add_connection -src uahbbus.htrans_slv0 -dest uahbram.htrans_s
baya_add_connection -src uahbbus.hwrite_slv0 -dest uahbram.hwrite_s
baya_add_connection -src uahbbus.haddr_slv0 -dest uahbram.haddr_s
baya_add_connection -src uahbbus.hsel_slv0 -dest uahbram.hsel_s

baya_elaborate -module  $socname
 
set str [baya_print_verilog -module $socname]

puts $str

baya_set_file -name system1.v
baya_print_verilog_file -module $socname

exit

//       Content of the outputfile: system1.v

/////////////////////////////////////////////////////////////////
//                                                             //
// This Verilog file has been generated by the tool named Baya,//
// a free tool from  http://www.edautils.com                      //
// Contact help@edautils.com for support-info.   //
//                                                             //
//                                                             //
/////////////////////////////////////////////////////////////////
//
//
// Generated by : baya on 1/24/12 1:15 PM
//
//


module Leon2Platform(
        logic_zero,
        clkin,
        rstin_an,
        SimDone
    );
    parameter myParam  = 2;
    input  [15:0] logic_zero;
    input clkin;
    input rstin_an;
    output SimDone;
    wire urgu_rstout_an_0;
    wire urgu_rstout_an_1;
    wire ucgu_clkout_0;
    wire ucgu_clkout_2;
    wire  [31:0] ucgu_prdata;
    wire uahbbus_hgrant_mst0;
    wire uahbbus_hgrant_mst1;
    wire uahbbus_hready_mst0;
    wire uahbbus_hready_mst1;
    wire  [1:0] uahbbus_hresp_mst0;
    wire  [1:0] uahbbus_hresp_mst1;
    wire  [31:0] uahbbus_hrdata_mst0;
    wire  [31:0] uahbbus_hrdata_mst1;
    wire uproc_hbusreq;
    wire udma_hbusreq;
    wire  [1:0] udma_htrans;
    wire  [1:0] uproc_htrans;
    wire uproc_hwrite;
    wire  [2:0] uproc_hsize;
    wire  [2:0] uproc_hburst;
    wire  [3:0] uproc_hprot;
    wire  [31:0] uproc_haddr;
    wire  [31:0] uproc_hwdata;
    wire  [31:0] uproc_prdata;
    wire uproc_intack;
    wire  [3:0] uproc_irqvec;
    wire uapbSubSystem_i_apbbus_slv6_psel;
    wire uapbSubSystem_i_apbbus_slv6_penable;
    wire  [11:0] uapbSubSystem_i_apbbus_slv6_paddr_11_0;
    wire uapbSubSystem_i_apbbus_slv6_pwrite;
    wire  [31:0] uapbSubSystem_i_apbbus_slv6_pwdata;
    wire  [3:0] uapbSubSystem_Interrupt_IRL;
    wire uapbSubSystem_i_apbbus_slv5_psel;
    wire uapbSubSystem_i_apbbus_slv5_penable;
    wire  [11:0] uapbSubSystem_i_apbbus_slv5_paddr;
    wire uapbSubSystem_i_apbbus_slv5_pwrite;
    wire  [31:0] urgu_prdata;
    wire udma_hwrite;
    wire  [2:0] udma_hsize;
    wire  [2:0] udma_hburst;
    wire  [3:0] udma_hprot;
    wire  [31:0] udma_hwdata;
    wire  [31:0] udma_prdata;
    wire  [31:0] udma_haddr;
    wire  [31:0] uapbSubSystem_i_apbbus_slv7_pwdata;
    wire uapbSubSystem_i_apbbus_slv7_pwrite;
    wire  [31:0] uapbSubSystem_i_apbbus_slv7_paddr;
    wire uapbSubSystem_i_apbbus_slv7_penable;
    wire uapbSubSystem_i_apbbus_slv7_psel;
    wire  [31:0] uapbSubSystem_i_apbbus_slv4_pwdata;
    wire uapbSubSystem_i_apbbus_slv4_pwrite;
    wire  [11:0] uapbSubSystem_i_apbbus_slv4_paddr_11_0;
    wire uapbSubSystem_i_apbbus_slv4_penable;
    wire uapbSubSystem_i_apbbus_slv4_psel;
    wire uahbbus_hwrite_slv1;
    wire  [31:0] uahbbus_hwdata_slv1;
    wire  [1:0] uahbbus_htrans_slv1;
    wire  [2:0] uahbbus_hsize_slv1;
    wire uahbbus_hsel_slv1;
    wire  [1:0] uapbSubSystem_ex_ambaAHB_hresp;
    wire  [3:0] uahbbus_hprot_slv1;
    wire  [2:0] uahbbus_hburst_slv1;
    wire  [31:0] uahbbus_haddr_slv1;
    wire uapbSubSystem_ex_ambaAHB_hready_resp;
    wire  [31:0] uapbSubSystem_ex_ambaAHB_hrdata;
    wire  [15:0] uahbram_hsplit_s;
    wire  [31:0] uahbram_hrdata_s;
    wire  [1:0] uahbram_hresp_s;
    wire uahbram_hreadyo_s;
    wire uahbbus_hmastlock_slv0;
    wire uahbbus_hreadyin_slv0;
    wire  [3:0] uahbbus_hprot_slv0;
    wire  [31:0] uahbbus_hwdata_slv0;
    wire  [2:0] uahbbus_hburst_slv0;
    wire  [2:0] uahbbus_hsize_slv0;
    wire  [1:0] uahbbus_htrans_slv0;
    wire uahbbus_hwrite_slv0;
    wire  [31:0] uahbbus_haddr_slv0;
    wire uahbbus_hsel_slv0;
    ahbbus22 #(
            .start_addr_slv0(0),
            .restart_addr_slv0(0),
            .range_slv0(1048576),
            .mst_access_slv0(3),
            .start_addr_slv1(12288),
            .restart_addr_slv1(12288),
            .range_slv1(36864),
            .mst_access_slv1(myParam + 1),
            .defmast(1)
        ) uahbbus (
            .clk(ucgu_clkout_0),
            .haddr_mst0(uproc_haddr),
            .haddr_mst1(udma_haddr),
            .haddr_slv0(uahbbus_haddr_slv0),
            .haddr_slv1(uahbbus_haddr_slv1),
            .hburst_mst0(uproc_hburst),
            .hburst_mst1(udma_hburst),
            .hburst_slv0(uahbbus_hburst_slv0),
            .hburst_slv1(uahbbus_hburst_slv1),
            .hbusreq_mst0(uproc_hbusreq),
            .hbusreq_mst1(udma_hbusreq),
            .hgrant_mst0(uahbbus_hgrant_mst0),
            .hgrant_mst1(uahbbus_hgrant_mst1),
            .hlock_mst0(logic_zero),
            .hmastlock_slv0(uahbbus_hmastlock_slv0),
            .hprot_mst0(uproc_hprot),
            .hprot_mst1(udma_hprot),
            .hprot_slv0(uahbbus_hprot_slv0),
            .hprot_slv1(uahbbus_hprot_slv1),
            .hrdata_mst0(uahbbus_hrdata_mst0),
            .hrdata_mst1(uahbbus_hrdata_mst1),
            .hrdata_slv0(uahbram_hrdata_s),
            .hrdata_slv1(uapbSubSystem_ex_ambaAHB_hrdata),
            .hready_mst0(uahbbus_hready_mst0),
            .hready_mst1(uahbbus_hready_mst1),
            .hreadyin_slv0(uahbbus_hreadyin_slv0),
            .hreadyout_slv0(uahbram_hreadyo_s),
            .hreadyout_slv1(uapbSubSystem_ex_ambaAHB_hready_resp),
            .hresp_mst0(uahbbus_hresp_mst0),
            .hresp_mst1(uahbbus_hresp_mst1),
            .hresp_slv0(uahbram_hresp_s),
            .hresp_slv1(uapbSubSystem_ex_ambaAHB_hresp),
            .hsel_slv0(uahbbus_hsel_slv0),
            .hsel_slv1(uahbbus_hsel_slv1),
            .hsize_mst0(uproc_hsize),
            .hsize_mst1(udma_hsize),
            .hsize_slv0(uahbbus_hsize_slv0),
            .hsize_slv1(uahbbus_hsize_slv1),
            .hsplit_slv0(uahbram_hsplit_s),
            .hsplit_slv1(logic_zero [15:0] ),
            .htrans_mst0(uproc_htrans),
            .htrans_mst1(udma_htrans),
            .htrans_slv0(uahbbus_htrans_slv0),
            .htrans_slv1(uahbbus_htrans_slv1),
            .hwdata_mst0(uproc_hwdata),
            .hwdata_mst1(udma_hwdata),
            .hwdata_slv0(uahbbus_hwdata_slv0),
            .hwdata_slv1(uahbbus_hwdata_slv1),
            .hwrite_mst0(uproc_hwrite),
            .hwrite_mst1(udma_hwrite),
            .hwrite_slv0(uahbbus_hwrite_slv0),
            .hwrite_slv1(uahbbus_hwrite_slv1),
            .remap(logic_zero),
            .rst(urgu_rstout_an_0)
        );
    leon2Ahbram #(
            .abits(20)
        ) uahbram (
            .clk(ucgu_clkout_0),
            .haddr_s(uahbbus_haddr_slv0),
            .hburst_s(uahbbus_hburst_slv0),
            .hmastlock_s(uahbbus_hmastlock_slv0),
            .hprot_s(uahbbus_hprot_slv0),
            .hrdata_s(uahbram_hrdata_s),
            .hreadyi_s(uahbbus_hreadyin_slv0),
            .hreadyo_s(uahbram_hreadyo_s),
            .hresp_s(uahbram_hresp_s),
            .hsel_s(uahbbus_hsel_slv0),
            .hsize_s(uahbbus_hsize_slv0),
            .hsplit_s(uahbram_hsplit_s),
            .htrans_s(uahbbus_htrans_slv0),
            .hwdata_s(uahbbus_hwdata_slv0),
            .hwrite_s(uahbbus_hwrite_slv0),
            .rst(urgu_rstout_an_0)
        );
    apbSubSystem uapbSubSystem (
            .Interrupt_INTack(uproc_intack),
            .Interrupt_IRL(uapbSubSystem_Interrupt_IRL),
            .Interrupt_IRQVEC(uproc_irqvec),
            .clk(ucgu_clkout_0),
            .ex_ambaAHB_haddr(uahbbus_haddr_slv1),
            .ex_ambaAHB_hburst(uahbbus_hburst_slv1),
            .ex_ambaAHB_hprot(uahbbus_hprot_slv1),
            .ex_ambaAHB_hrdata(uapbSubSystem_ex_ambaAHB_hrdata),
            .ex_ambaAHB_hready_resp(uapbSubSystem_ex_ambaAHB_hready_resp),
            .ex_ambaAHB_hresp(uapbSubSystem_ex_ambaAHB_hresp),
            .ex_ambaAHB_hsel(uahbbus_hsel_slv1),
            .ex_ambaAHB_hsize(uahbbus_hsize_slv1),
            .ex_ambaAHB_htrans(uahbbus_htrans_slv1),
            .ex_ambaAHB_hwdata(uahbbus_hwdata_slv1),
            .ex_ambaAHB_hwrite(uahbbus_hwrite_slv1),
            .i_apbbus_slv4_paddr(uapbSubSystem_i_apbbus_slv4_paddr_11_0),
            .i_apbbus_slv4_penable(uapbSubSystem_i_apbbus_slv4_penable),
            .i_apbbus_slv4_prdata(ucgu_prdata),
            .i_apbbus_slv4_psel(uapbSubSystem_i_apbbus_slv4_psel),
            .i_apbbus_slv4_pwdata(uapbSubSystem_i_apbbus_slv4_pwdata),
            .i_apbbus_slv4_pwrite(uapbSubSystem_i_apbbus_slv4_pwrite),
            .i_apbbus_slv5_paddr(uapbSubSystem_i_apbbus_slv5_paddr),
            .i_apbbus_slv5_penable(uapbSubSystem_i_apbbus_slv5_penable),
            .i_apbbus_slv5_prdata(urgu_prdata),
            .i_apbbus_slv5_psel(uapbSubSystem_i_apbbus_slv5_psel),
            .i_apbbus_slv5_pwrite(uapbSubSystem_i_apbbus_slv5_pwrite),
            .i_apbbus_slv6_paddr(uapbSubSystem_i_apbbus_slv6_paddr_11_0),
            .i_apbbus_slv6_penable(uapbSubSystem_i_apbbus_slv6_penable),
            .i_apbbus_slv6_prdata(uproc_prdata),
            .i_apbbus_slv6_psel(uapbSubSystem_i_apbbus_slv6_psel),
            .i_apbbus_slv6_pwdata(uapbSubSystem_i_apbbus_slv6_pwdata),
            .i_apbbus_slv6_pwrite(uapbSubSystem_i_apbbus_slv6_pwrite),
            .i_apbbus_slv7_paddr(uapbSubSystem_i_apbbus_slv7_paddr),
            .i_apbbus_slv7_penable(uapbSubSystem_i_apbbus_slv7_penable),
            .i_apbbus_slv7_prdata(udma_prdata),
            .i_apbbus_slv7_psel(uapbSubSystem_i_apbbus_slv7_psel),
            .i_apbbus_slv7_pwdata(uapbSubSystem_i_apbbus_slv7_pwdata),
            .i_apbbus_slv7_pwrite(uapbSubSystem_i_apbbus_slv7_pwrite),
            .rst_an(urgu_rstout_an_0)
        );
    cgu ucgu (
            .clkout({ ucgu_clkout_0, ucgu_clkout_0, ucgu_clkout_0, ucgu_clkout_0, ucgu_clkout_0, ucgu_clkout_0, ucgu_clkout_0, ucgu_clkout_2, ucgu_clkout_0 }),
            .paddr(uapbSubSystem_i_apbbus_slv4_paddr_11_0),
            .pclk(ucgu_clkout_0),
            .penable(uapbSubSystem_i_apbbus_slv4_penable),
            .prdata(ucgu_prdata),
            .presetn(urgu_rstout_an_0),
            .psel(uapbSubSystem_i_apbbus_slv4_psel),
            .pwdata(uapbSubSystem_i_apbbus_slv4_pwdata),
            .pwrite(uapbSubSystem_i_apbbus_slv4_pwrite)
        );
    leon2Dma udma (
            .clk({ ucgu_clkout_0, ucgu_clkout_2 }),
            .haddr(udma_haddr),
            .hburst(udma_hburst),
            .hbusreq(udma_hbusreq),
            .hgrant(uahbbus_hgrant_mst1),
            .hprot(udma_hprot),
            .hrdata(uahbbus_hrdata_mst1),
            .hready(uahbbus_hready_mst1),
            .hresp(uahbbus_hresp_mst1),
            .hsize(udma_hsize),
            .htrans(udma_htrans),
            .hwdata(udma_hwdata),
            .hwrite(udma_hwrite),
            .paddr(uapbSubSystem_i_apbbus_slv7_paddr),
            .penable(uapbSubSystem_i_apbbus_slv7_penable),
            .prdata(udma_prdata),
            .psel(uapbSubSystem_i_apbbus_slv7_psel),
            .pwdata(uapbSubSystem_i_apbbus_slv7_pwdata),
            .pwrite(uapbSubSystem_i_apbbus_slv7_pwrite),
            .rst(urgu_rstout_an_0)
        );
    processor #(
            .local_memory_start_addr(16'h1000),
            .local_memory_addr_bits(12)
        ) uproc (
            .SimDone(SimDone),
            .clkn(logic_zero[0]),
            .haddr(uproc_haddr),
            .hburst(uproc_hburst),
            .hbusreq(uproc_hbusreq),
            .hclk(ucgu_clkout_0),
            .hgrant(uahbbus_hgrant_mst0),
            .hprot(uproc_hprot),
            .hrdata(uahbbus_hrdata_mst0),
            .hready(uahbbus_hready_mst0),
            .hresetn(urgu_rstout_an_0),
            .hresp(uahbbus_hresp_mst0),
            .hsize(uproc_hsize),
            .htrans(uproc_htrans),
            .hwdata(uproc_hwdata),
            .hwrite(uproc_hwrite),
            .intack(uproc_intack),
            .irl(uapbSubSystem_Interrupt_IRL),
            .irqvec(uproc_irqvec),
            .ntrst(logic_zero[0]),
            .paddr(uapbSubSystem_i_apbbus_slv6_paddr_11_0),
            .pclk(ucgu_clkout_0),
            .penable({ uapbSubSystem_i_apbbus_slv6_penable, uapbSubSystem_i_apbbus_slv5_penable }),
            .prdata(uproc_prdata),
            .presetn(urgu_rstout_an_0),
            .psel({ uapbSubSystem_i_apbbus_slv6_psel, uapbSubSystem_i_apbbus_slv5_psel }),
            .pwdata(uapbSubSystem_i_apbbus_slv6_pwdata),
            .pwrite(uapbSubSystem_i_apbbus_slv6_pwrite),
            .rst_an(urgu_rstout_an_1),
            .tck(logic_zero[0]),
            .tdi(logic_zero[0]),
            .tdo(logic_zero[15]),
            .tms(logic_zero[0])
        );
    rgu urgu (
            .paddr(uapbSubSystem_i_apbbus_slv5_paddr),
            .pclk(ucgu_clkout_0),
            .prdata(urgu_prdata),
            .presetn(urgu_rstout_an_0),
            .pwrite(uapbSubSystem_i_apbbus_slv5_pwrite),
            .rstout_an({ urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_0, urgu_rstout_an_1 })
        );
endmodule 

setenv EDAUTILS_ROOT <Installation path>/<Release Tag>
set path = ( $EDAUTILS_ROOT/bin $path )
baya-shell -f create_design.tcl
Alternatively source the setup_env('.csh' or '.sh' or '.bat') to set the environment variables.
The content of this input Tcl file create_design.tcl and the generated output has been given below.
If you have any question concerning bug fixes, new features and  enhancements, please don't hesitate to contact. You will get the best solutions at the earliest.
Online Demo