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Welcome.
If you’re looking for professional quality free EDA tools, you’ve come to the right place. 

At Miscellaneous EDA Utilities you’ll get the attention and customized service you deserve.
  • New Utility Development
  • Enhancements and Customization of exsting utilities
All tools from EDAUtils are distributed with  OpenTech 1.9.0 , last release was on 16th September'12.
“The collection of tools and utilities fills a real void in EDA. The baya tool is exactly what we had been looking for to assemble large top-level modules in Verilog. The GUI and high-level TCL commands are intuitive, allowing designers to get started immediately and feel right at home. It was straightforward to quickly reproduce a module previously done with a Perl-to-Verilog utility that was hard to use and maintain. The support from Kanai is excellent. He responds quickly and is a pleasure to deal with. Nice work, Kanai!” - Michael Trocino, IC Design Manager, Coherent Logix

"Baya is a mature production quality tool with features and capabilities beyond those of tools provided by large EDA vendors. It's flexibility is a key reason we have chosen it for use in our Cloud-based platform." - David Fritz, CEO, Social Silicon

"Kanai produced an excellent tool set, which is very useful for a complex system-on-chip integration flows. We were skeptical in the beginning, but later got really impressed by a high quality and ease of use.  Bridgit IPXACT creator helps us to pack register, bus and module interfaces into a IEEE standard *.xml SPIRIT format to ensure high reusability in the future and protect our investments. I high recommend using Kanai’s products for every system-on-chip manufacturer and invest Venture Capital to support further improvement and commercialization." - Boris V. Kuznetsov
Processorpreneur, CEO @ SOCC

"Hi Kanai, thanks a lot for creating DesignPlayer and the huge java class lib behind.
Even I discoverd only the tip of the iceberg, I got already a lot of my project done.
I'm sure there is much more. Your strong support makes me confident to explore more details in future." -Rolf Kemper,  Manager, Mixed Signal Design, Renesas Electronics Europe

"EDAUtils is one (if not the only one) of the most comprehensive tools for SoC design and integration and it is available for free. I included EDAUtils in the latest OpenTech Package as featured application among all free open source designs and tools and I believe with a lot of efforts it will grow to be one of the major tools in this domain." - Jamil Khatib, OpenTech Package

"thanks for efficient tools which have been successfully used in our internal wireless design flow. Friendly support has been highly appreciated." - Claudine Raibaut, EDA Manager, Texas Instruments

"Hi Kanai ,That really helped me now .. I got the job done at the right time ..." -S. Krishnan, Intel

"We were very pleased with your response. The VHDL2Verilog translator worked great, even handling the generate statements in the source VHDL. It met our needs exactly. It was very easy to work with you and you delivered the translator super fast. Thanks for the great support!" - Jerry Frenkil, VP of Engineering, NanoWatt Design

"We use the Verilog Parser for developing FPGA CAD Applications. The library is very stable and EDAUtils provided much helpful support to us!" - Dustin Peterson, University Tuebingen, Germany

"... thanks - don't need anything else right now - thanks for your help getting this working." -Jeff Winston, VP Hardware Development, ORB Analytics

"Thanks for your quick answer. For the output, i think that GUI is not necessary. And if it's possible to have for each clock and reset ..."Pierre Bonneau, ID MOS

"Thank you for the attention, it is working perfectly to me, it is very useful." - Lucas Teixeira, SMDH

" ...I like the IP-XACT tools and others that you have developed. ... IP-XACT tools are a great ..." - Amal Khailtash, Lead FPGA Designer, Ciena Communications 

"I used his VHDL Parser Library for my simple personal projects on vhdl code analysis. He is always open for propositions and always ready to get you good support." - Vitaliy Kulanov, Senior Lecturer (National Aerospace University (KhAI))

"The netlist parser provides a easy to use and flexible environment for developing my own custom analysis tools. The best part of the experience has been the prompt and helpful support. " - Gene Y Wu, University of Texas 

"I have tested the VHDL and Verilog RTL parsers API. I managed to make them work very easy on Ubuntu Linux. In my personal opinion, one can integrate the parsers in his Java project only by using the HDL logic and knowledge, without to much reading of the documentation, since the API is very intuitive and strait forward, supported by few very useful examples." Vladimir Zdraveski, Faculty of Computer Science and Engineering (FCSE)

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